程耀林.一种基于ADS5232的高速数据采集电路的设计方法[J].中南民族大学学报自然科学版,2012,(4):97-100
一种基于ADS5232的高速数据采集电路的设计方法
A Design Method of High Speed Data Acquisition Circuit Based on ADS5232
  
DOI:
中文关键词: 高速数据采集  ADS5232 芯片  ADC 前端  现场可编程门阵列
英文关键词: high-speed Data Acquisition  ADS5232 chip  ADC front end  FPGA
基金项目:中南民族大学校基金资助项目( YZY07003)
作者单位
程耀林 中南民族大学电子信息工程学院武汉430074 
摘要点击次数: 1029
全文下载次数: 2981
中文摘要:
      利用高速ADC 芯片ADS5232 设计了一种实用的高速数据采集电路,其中ADS5232 集成了2 个采样通道,不需要外部提供参考电压,简化了PCB 设计. 2 个通道使用同一个时钟,可实现同步采样. 每个通道的最高采样速率达到65MS /s,精度为12bit. 采集电路包括ADC 前端、ADS5232 和FPGA 3 个部分,支持单端和差分模拟信号输入,使用FPGA 实现高速控制,在片内配置RAM 作为采集数据的缓冲区,同时可设计接口模块用于跟片外应用电路的连接. 该电路能够实现高速AD、高速控制、高速缓存以及与外部逻辑的高速接口.
英文摘要:
      A practical high speed data acquisition circuit was designed based on high-speed ADC chip ADS5232 . Among this circuit,two sampling channels were integrated into ADS5232,and the chip did not need to provide external reference voltage,and therefore it can simplify PCB design. Two channels use the same clock,so that the synchronous sampling can be realized. The highest sampling rate of each channel reaches 65 MS /s and the accuracy is 12 bit. The data acquisition circuit consists of three parts including ADC front end,ADS5232 and FPGA,which support single-end signal and difference signal analog inputs,FPGA is used to realize high speed control and to design the interface with external application circuit for connection and the RAM on chip is configurated as data buffer. This circuit can realize high speed AD,control,cache and interface with external logic.
查看全文   查看/发表评论  下载PDF阅读器
关闭